SoC/FPGA Engineer 2

NOKIA Westford, MA is seeking to hire a talented engineer with a background in Complex Programmable Logic Device (CPLD) and/or Field Programmable Gate Array (FPGA) design to support its scalable IP routing solutions for access, aggregation, edge, and core networks. Qualified candidates will join a diverse, multi-disciplinary team and implement programmable devices for high availability (Five Nines) IP routing products.
 

Our team specializes in design of CPLDs and FPGAs by leveraging both in-house developed and vendor supplied Intellectual Property. Primary responsibilities include:

• Working with board design engineering team to architect right-sized programmable solutions that meet or exceed product requirements;
• Writing detailed design, functional, and programming guideline specifications;
• Design, verification, and implementation of CPLD/FPGAs keeping cost, testability, and migratability at the forefront;
• Interfacing with diagnostic engineering team to support bring up, DVT, and manufacturing testing;
• Interfacing with software engineering team to support functional testing and implement additional features as requested; and
• Keeping abreast of technological advancements.
   

• Bachelor’s degree in Computer and/or Electrical Engineering with minimum 3 years of industry experience in developing programmable solutions.
• Demonstrable understanding of digital electronic design principles and clocked synchronous circuit design.
• Expertise in programming with one or more Hardware Description Languages (HDL) such as VHDL, Verilog, or System Verilog (VHDL is preferred).
• Proven track record of experience with Xilinx, Altera, and Lattice supplied synthesis and PNR toolsets; thorough understanding of static timing and power analysis flow and constraints.
• Strong understanding of networking standards, external memory interfaces, and serial communication protocols like I2C, SPI, SVID, etc.
• Excellent verbal and written communication skills.

Selected applicants may be subject to background checks and must meet requirements to work on-site and labs. 

Preferred Qualifications:

• Master’s degree in Computer and/or Electrical Engineering or similar field.
• Demonstrable experience with cutting edge, reconfigurable SoC platforms (Lattice MachXOx, AMD Xilinx Ultrascale/Ultrascale-Plus/Versal, Intel Altera Stratix10/Agilex).
• Familiarity with all phases of design cycle, including architecture, implementation, verification, documentation, and version control.
• Expertise in scripting languages and build tools (TCL, Perl, Python, …).
• Proven track record of delivering CPLD/FPGA/ASIC designs from RTL, through simulation, synthesis, lab bring-up and debug.